Recently, there have been growing demands for displays capable of displaying three-dimensional images, or so-called 3D images. Methods for displaying three-dimensional images have long been explored. At the present, vigorous research and development efforts are being made. One of the currently most prospective methods utilizes the parallax between the eyes.
Three-dimensional display devices utilizing the parallax between the eyes are classified into two types: one type employs special glasses to project different images on the right and left eyes (which is termed “the glasses scheme,” hereafter) and the other type spatially separates and projects light of right and left different images emitted from a three-dimensional display device without using special glasses (which is termed “the naked eye scheme,” hereafter).
The former glasses scheme is suitable where multiple observers view a relatively large screen together and used in movie theaters and for televisions. The latter naked eye scheme is suitable where one observer views a relatively small screen. Particularly, the naked eye scheme eliminates the burden of wearing special glasses and allows for viewing of three-dimensional images with no hassle. Therefore, this scheme is expected to apply to portable terminals, digital still cameras, video cameras, and note-type computer displays.
A liquid crystal display device capable of displaying three-dimensional images in the naked eye scheme is disclosed in Unexamined Japanese Patent Application Publication No. 2006-030512. The Unexamined Japanese Patent Application Publication No. 2006-030512 discloses a liquid crystal display device comprising pixels arranged in a matrix of 3×3 in the X-axis and Y-axis directions and each consisting of six subpixels RR, RL, GR, GL, BR, and BL. The liquid crystal display device disclosed in the Unexamined Japanese Patent Application Publication No. 2006-030512 uses one pixel consisting of the six subpixels for projecting R, G, and B lights constituting a color image on the two, right and left, eyes. Here, the subpixel RR is a subpixel to display a red image for the right eye and RL is a subpixel to display a red image for the left eye. Similarly, the GR, GL, BR and, BL are subpixels to display green images for the right and left eyes and blue images for the right and left eyes, respectively.
The above subpixels are composed of the circuit as shown in FIG. 43. Each subpixel has a pixel thin film transistor TFT as a switching element, a liquid crystal capacitor Clc, and a storage capacitor Cst. The gate terminal of the pixel thin film transistor TFT is connected to a gate line Gn shared by a row of subpixels arranged in the X-axis direction. The drain terminal of the pixel thin film transistor TFT is connected to a data line Dm shared by a column of subpixels arranged in the Y-axis direction. The source terminal of the pixel thin film transistor TFT is connected to the liquid crystal capacitor Clc and storage capacitor Cst.
In the liquid crystal display device disclosed in the Unexamined Japanese Patent Application Publication No. 2006-030512, as shown in FIG. 44, a cylindrical lens having a pitch P1 is arranged in an array in the X-axis direction over columns of pixels arranged in the X-axis and Y-axis directions with a pitch Pp. The observer views the liquid crystal display device in the Z-axis direction. The right-eye red light emitted from the subpixel RR is released into a zone ZR in the space via a cylindrical lens 3a as shown in FIG. 45. Similarly, the left-eye red light emitted from the subpixel RL is released into a zone ZL in the space via the cylindrical lens 3a. Here, as the observer places the right and left eyes in the zones ZR and ZL, respectively, he/she can view a right-eye image with the right eye 8R and a left-eye image with the left eye 8L. Then, the observer can recognize an image displayed on the liquid crystal display device as a three-dimensional image.
The liquid crystal display device disclosed in the Unexamined Japanese Patent Application Publication No. 2006-030512 has a excellent characteristic, which is that the observer does not see the colors separate even if he/she shakes the head right and left (in the X-axis direction). The cylindrical lens 3a has a lens effect only in the direction perpendicular to the extending direction of the lens (the X-axis direction) and has no lens effect in the extending direction (the Y-axis direction). Here, the liquid crystal display device disclosed in the Unexamined Japanese Patent Application Publication No. 2006-030512 has the subpixels of the same color in the X-axis direction. Therefore, the lights of primary colors R, G, and B are not emitted in different directions by the lens and high quality three-dimensional images without color separation can be displayed. Therefore, the observer does not see the color separate even if he/she shakes the head.
However, the liquid crystal display device disclosed in the Unexamined Japanese Patent Application Publication No. 2006-030512 has some problems such as possible insufficient writing of signals due to short time to write video signals in the subpixels, occurrence of moire, and an increased size of a circuit driving the data lines.
First, the reason for possible insufficient writing of signals is discussed. The liquid crystal display device disclosed in the Unexamined Japanese Patent Application Publication No. 2006-030512 operates as shown in FIG. 46. Here, a frame time period Tv is the time period to write signals for one screen in the liquid crystal display device. A horizontal time period Th is the time period to write signals for a row of subpixels of the liquid crystal display device. In a horizontal time period Th, a signal is applied to any one gate line to turn on the pixel thin film transistors TFT. Concurrently, video signals are written in all data lines so that the video signals on the data lines are written in the liquid crystal capacitors Clc and storage capacitors Cst via the pixel thin film transistors TFT. This operation is conducted on all gate lines to write video signals for one screen.
Here, the liquid crystal display device disclosed in the Unexamined Japanese Patent Application Publication No. 2006-030512 has a resolution of 3×3 and one pixel is divided into six subpixels, two in the X-axis direction and three in the Y-axis direction. Therefore, one frame time period has to be divided into at least nine, 3 times 3, horizontal time periods. In other words, the horizontal time periods as many as three times the actual number of pixels in the Y-axis direction are necessary. For example, for a resolution of VGA (640×480 pixels), 1440 horizontal time periods Th are necessary. The number of horizontal time periods Th, 1440, is higher than the number of horizontal time periods for a resolution of conventional (two-dimensional display) FHD (1920×1080). Therefore, insufficient writing is likely to occur.
Next, occurrence of moire is discussed. The liquid crystal display device disclosed in the Unexamined Japanese Patent Application Publication No. 2006-030512 emits light as shown in FIG. 47. In the liquid crystal display device disclosed in the Unexamined Japanese Patent Application Publication No. 2006-030512, each subpixel is zoned and surrounded by a region transmitting no light (“a shielding part,” hereafter) 52 in the X-axis and Y-axis directions. The shielding part 52 of the liquid crystal panel 2 is projected to the observer as a zone Zd via the cylindrical lens 3a. The zone Zd, where no light is emitted from the liquid crystal panel 2, looks black to the observer. This black zone appears intermittently and is recognized as moire.
Finally, the reason for an increased size of a data line drive circuit is discussed. The circuit driving the data lines (the data driver) in the liquid crystal display device disclosed in the Unexamined Japanese Patent Application Publication No. 2006-030512 generally consists of a circuit as shown in FIG. 48. This data driver consists of two sets of memories, MR1 to MRm, MG1 to MGm, and MB1 to MBm, and M′R1 to M′Rm, M′G1 to M′Gm, and M′B1 to M′Bm, selection circuits SL1 to SLm, DACs (digital-analog converters) DA1 to DAm, and amplifiers AM1 to AMm. The two sets of memories each have a capacity to store video signals for one row of pixels. The selection circuits, DACs, and amplifiers at least as many as the number of subpixels in a row of subpixels are provided. This data driver temporarily stores red, green, and blue digitalized video signals supplied to the signal lines SR, SG, and SB from a signal source therein, converts them to analog signals, and supplies them to the data lines of the liquid crystal display device in sequence on the basis of a row of subpixels.
The above data driver operates as shown in FIG. 49. SR, SG, and SB present times for video signals to be supplied from a signal source. MR1 to MBm present transition in the content of the first set of memories. M′R1 to M′Bm present transition in the content of the second set of memories. DA1 to DAm present transition in the output of DACs. Video signals are supplied from a signal source in sequence generally on the bases of red, green, and blue data for one pixel. However, in the liquid crystal display device disclosed in the Unexamined Japanese Patent Application Publication No. 2006-030512, the subpixels of the same color, red, green, or blue, are arranged in stripes in the row direction and driven by individual different gate lines. Then, the time to output video signals is adjusted among the data drivers. Video signals for a row of subpixels are output in sequence in time periods, ThRn, ThGn, and ThBn, obtained by dividing the time period Th′n by 3. Here, signals for a row of red subpixels are output in a time period ThRn, signals for a row of green subpixels are output in a time period ThGn, and signals for a row of blue subpixels are output in a time period ThBn.
The codes written in the signals of the timing chart present how video signals supplied from a signal source are retained, transferred, and output via DAC circuits. For example, a signal R1 to be supplied to a signal line SR in a time period Th′n is first retained in a memory MR1 of the first set and, after all video signals are retained in the first set of memories in a time period Th′n, transferred to a memory M′R1 of the second set. Therefore, the code R1 in the second half of a time period Th′n is presented as M′R1.
Then, at the beginning of a time period Th′n+1, the signal retained in the memory MR′1 of the second set is transferred to a DAC DA1 via a selection circuit SL1 for output. Therefore, the code R1 is written at the beginning of the time period Th′n+1 under the DA1. Other codes are written according to the same rules. As seen from this timing chart, video signals are supplied to the liquid crystal display device in sequence on the basis of a row of red, green, or blue subpixels. Therefore, for example, before a signal G1 retained in a memory MG1 of the first set in the time period Th′n is output to the liquid crystal display device via a DAC, a signal G′1 of the next pixel row is supplied to the data driver. Therefore, two sets of memories are necessary so that a new signal is not written before a signal retained in the memory is output. Furthermore, a selection circuit for selectively outputting a signal retained in the second set to the DAC circuit is also necessary.
Then, the size of the circuit is discussed. The above data driver has DACs and amplifiers as many as the number of subpixels in a row of subpixels. This is smaller in number than the number of pixels multiplied by the number of colors and by two or the number of right and left images.
However, a set of memories and a set of selection circuits are additionally necessary. Here, provided that the data driver is incorporated in a semiconductor device, the circuit area for incorporating the circuits is discussed. The circuit area of a DAC and amplifier depends on the frequency property required. In other words, the individual elements constituting a circuit have to be increased in size in order for the circuit to operate at a tripled speed with the same circuit configuration. In practice, the element size of the output part of the circuit is increased. Even if the number of circuits is reduced, the circuit area is not significantly diminished as long as the drive frequency is accordingly increased. Furthermore, for complex operation, the control circuit controlling such operation is increased in size. Then, the data driver is increased in size and then in cost.
A method of resolving the above problem of possible insufficient writing is disclosed in Unexampled Japanese Patent Application Publication No. S64-025196. The liquid crystal display device disclosed in the Unexampled Japanese Patent Application Publication No. S64-025196 has 4×4 pixels in the X-axis and Y-axis directions, a gate line shared by two rows of pixels, and two data lines for each row of pixels as shown in FIG. 50. The liquid crystal display device disclosed in the Unexampled Japanese Patent Application Publication No. S64-025196 operates as shown in FIG. 51. The liquid crystal display device disclosed in the Unexampled Japanese Patent Application Publication No. S64-025196 has four rows of pixels; two rows of pixels are driven by the same signal. Therefore, two horizontal time periods Th are required in one frame time period. Then, a long horizontal time period Th is assured, which can resolve insufficient writing of signals in the pixels.
A method of reducing moire, which is another problem, is disclosed in Unexamined Japanese Patent Application Publication No. H10-186294. The subpixel disclosed in the Unexamined Japanese Patent Application Publication No. H10-186294 has the structure shown in FIG. 52. As described above, moire is attributed to the shielding part extending in the extending direction of the cylindrical lens (the Y-axis direction). More specifically, moire is determined by the ratio between the width of the shielding part and the width of the opening in the Y-axis direction in a pixel. If this ratio varies depending on the position in the X-axis direction, the observer is aware of change in the brightness according to the angle to view the liquid crystal display device while he/she is viewing the liquid crystal display device through the cylindrical lens. Therefore, in order to eliminate moire, the ratio between the width of the shielding part and the width of the opening should be constant regardless of the position in the X-axis direction. In the subpixel disclosed in the Unexamined Japanese Patent Application Publication No. H10-186294, the shielding part extending in Y-axis direction has an angle θ with respect to the X-axis. Then, the width d of the shielding part in the Y-axis direction is expressed by the formula below in which e is the width of the diagonal shielding part:d=e/cos θ  [Math 1]
The width of the opening in a region where the diagonal shielding part is present is the total of widths b and c. The total value is constant regardless of the position in the X-axis direction provided that the sides Et and Eb defining the opening are parallel to each other. On the other hand, in a region where the diagonal shielding part is absent, the width a of the opening is constant regardless of the position in the X-axis direction and equal to the total of the widths b and c provided that the sides Et′ and Eb defining the opening are parallel to each other and the widths f and d are equal. Here, the sides El, El′, Er are parallel to each other.
Another method of obtaining a constant ratio between the width of the shielding part and the width of the opening in the Y-axis direction regardless of the position in the X-axis direction is disclosed in Unexamined Japanese Patent Application Publication No. 2008-092361. The subpixel disclosed in the Unexamined Japanese Patent Application Publication No. 2008-092361 has a parallelogram opening as shown in FIG. 53 so as to definitely overlap with subpixels adjacent in the X-axis direction. Because the opening is of a parallelogram, the sides Et and Eb are parallel and the sides El and Er are also parallel. Therefore, the width a and the total of widths b and c of the opening in the Y-axis direction are always equal regardless of the position in the X-axis direction. Furthermore, there are various other methods for reducing moire (for example, Unexamined Japanese Patent Application Publication Nos. 2008-249887 and 2005-208567).